The present invention relates to finite impulse response (FIR) filters, and more particularly to a FIR filter for programmable decimation by powers of two.
A decimate-by-two FIR filter has the following ideal characteristics: ##EQU1## In practice a Parks-McClellan equi-ripple design algorithm, using the Remez exchange algorithm with Chebyshev design theory, has a smooth and monotonic response in the transition region of Equation (2). With this response every other output from the filter may be discarded without aliasing problems, and the transition band becomes the rejected band for any following decimation stage, allowing for cascading. Therefore decimation by 2.sup.m may be performed with m filter stages coupled in series. Such a direct approach to decimating by 2.sup.m where m is large results in a huge amount of hardware. Furthermore later decimation stages have lower structural usage, defined as operations per gate per clock event.
What is desired is a FIR filter for programmable decimation by powers of two that reduces the amount of hardware required while maximizing the operations per gate per clock event.